VS28F016SV Datasheet, PDF (39/50 Pages) Intel Corporation – 16-Mbit (1-Mbit x 16, 2-Mbit x 8) FlashFileTM MEMORY

VS28F016SV MS28F016SV FlashFile^TM Memory
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NOTES
1 This address string depicts data write erase cycles with corresponding verification via ESRD
2 This address string depicts data write erase cycles with corresponding verification via CSRD
3 This cycle is invalid when using CSRD for verification during data write erase operations
4 CEx is defined as the latter of CE₀ or CE₁ going low or the first of CE₀ or CE₁
5 RP low transition is only to show t_RHPL not valid for above Read and Write cycles
6 V_PP voltage during write erase operations valid at both 12 0V and 5 0V
7 V_PP voltage equal to or below V_PPLK provides complete flash memory array protection
going high
Figure 14 AC Waveforms for Command Write Operations
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