VS28F016SV Datasheet, PDF (3/50 Pages) Intel Corporation – 16-Mbit (1-Mbit x 16, 2-Mbit x 8) FlashFileTM MEMORY

VS28F016SV MS28F016SV FlashFile^TM Memory
1 0 INTRODUCTION
The documentation of the Intel VS MS28F016SV
memory device includes this data sheet a detailed
user’s manual and a number of application notes
all of which are referenced at the end of this data
sheet
The data sheet is intended to give an overview of
the chip feature-set and of the operating AC DC
specifications The 28F016SA (compatible with
VS MS28F016SV) User’s Manual provides com-
plete descriptions of the user modes system inter-
face examples and detailed descriptions of all princi-
ples of operation It also contains the full list of
software algorithm flowcharts and a brief section on
compatibility with the Intel VE28F008 and M28F008
1 1 Enhanced Features
The VS MS28F016SV is backwards compatible with
the VE28F008 and M28F008 and offers the follow-
ing enhancements
 SmartVoltage Technology
Selectable 5 0V or 12 0V V_PP
 V_PP Level Bit in Block Status Register
 Additional RY BY Configuration
Pulse-On-Write Erase
 Additional Upload Device Information Command
Feedback
Device Revision Number
Device Proliferation Code
Device Configuration Code
 x8 x16 Architecture
 Block Locking
 2 Page Buffers
 Instruction Queuing
1 2 Product Overview
The VS MS28F016SV is a high-performance
16-Mbit (16 777 216-bit) block erasable non-volatile
random access memory organized as either
1 Mword x 16 or 2 Mbyte x 8 The VS MS28F016SV
includes thirty-two 64-KB (65 536 byte) blocks or
thirty-two 32-KW (32 768 word) blocks A chip mem-
ory map is shown in Figure 3
The implementation of a new architecture with
many enhanced features will improve the device op-
erating characteristics and result in greater product
reliability and ease of use
The VS MS28F016SV incorporates SmartVoltage
technology providing V_CC operation at both 3 3V
and 5 0V and program and erase capability at V_PP ^e
12 0V or 5 0V Operating at V_CC ^e 3 3V the
VS MS28F016SV consumes approximately one-half
the power consumption at 5 0V V_CC while 5 0V V_CC
provides highest read performance capability V_PP
e _{5 0V operation eliminates the need for a separate}
12 0V converter while V_PP ^e 12 0V maximizes
write erase performance In addition to the flexible
program and erase voltages the dedicated V_PP
gives complete code protection with V_PP ^s V_PPLK
Depending on system design specifications the
VS MS28F016SV is capable of supporting
80 ns access times with a V_CC of 5 0V g5% and
loading of 30 pF
85 ns access times with a V_CC of 5 0V g10%
and loading of 100 pF
120 ns access times with a V_CC of 3 3V g5%
and loading of 50 pF
A 3 5 input pin configures the device’s internal cir-
cuitry for optimal 3 3V or 5 0V Read Write operation
A Command User Interface (CUI) serves as the sys-
tem interface between the microprocessor or micro-
controller and the internal memory operation
Internal Algorithm Automation allows Byte Word
Writes and Block Erase operations to be executed
using a Two-Write command sequence to the CUI in
the same way as the VE28F008 or M28F008 8-Mbit
FlashFile memory
A super-set of commands has been added to the
basic VE28F008 or M28F008 command-set to
achieve higher write performance and provide addi-
tional capabilities These new commands and fea-
tures include
 Page Buffer Writes to Flash
 Command Queuing Capability
 Automatic Data Writes during Erase
 Software Locking of Memory Blocks
 Two-Byte Successive Writes in 8-bit Systems
 Erase All Unlocked Blocks
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