HYB25L512160AC Datasheet, PDF (27/50 Pages) Infineon Technologies AG – 512MBit Mobile-RAM

HYB25L512160AC–7.5
512MBit Mobile-RAM
Functional Description
3.4.5.3 READ - DQM Operation
DQM may be used to suppress read data and place the output buffers into High-Z state. The generic timing
parameters as listed in Table 10 also apply to this DQM operation. The read burst in progress is not affected and
will continue as programmed.
CLK
Command READ
Address
Ba A,
Col n
DQM
NOP
NOP
t_DQZ
NOP
NOP
NOP
NOP
NOP
DQ
DO n
DO n+2 DO n+3
Ba A, Col n = bank A, column n
DO n = Data Out from column n
CL = 2 in the case shown.
DQM read latency t_DQZ is 2 clock cycles
= Don't Care
Figure 23 READ Burst - DQM Operation
3.4.5.4 READ to WRITE
A READ burst may be followed by or truncated with a WRITE command. The WRITE command can be performed
to the same or a different (active) bank. Care must be taken to avoid bus contention on the DQs; therefore it is
recommended that the DQs are held in High-Z state for a minimum of 1 clock cycle. This can be achieved by either
delaying the WRITE command, or suppressing the data-out from the READ by pulling DQM HIGH two clock cycles
prior to the WRITE command, as shown in Figure 24. With the registration of the WRITE command, DQM acts as
a write mask: when asserted HIGH, input data will be masked and no write will be performed.
Please note that truncation of a READ burst by a subsequent READ or WRITE is only possible when both
commands are issued to the same chip of this stacked configuration.
Data Sheet
27
Rev. 1.3, 2004-04
10212003-BSPE-77OL