HYB25L512160AC Datasheet, PDF (26/50 Pages) Infineon Technologies AG – 512MBit Mobile-RAM

HYB25L512160AC–7.5
512MBit Mobile-RAM
Functional Description
3.4.5.1 READ Burst Termination
Data from any READ burst may be truncated using the BURST TERMINATE command (see Page 35), provided
that Auto Precharge was not activated. The BURST TERMINATE latency is equal to the CAS latency, i.e. the
BURST TERMINATE command must be issued x clock cycles before the clock edge at which the last desired data
element is valid, where x equals the CAS latency for READ bursts minus 1. This is shown in Figure 21. The
BURST TERMINATE command may be used to terminate a full-page READ which does not self-terminate.
CLK
Command READ
Address
Ba A,
Col n
DQ
DQ
NOP
NOP
BST
NOP
NOP
NOP
CL=2
DO n
CL=3
DO n+1 DO n+2
DO n
DO n+1 DO n+2
NOP
NOP
Ba A, Col n = Bank A, Column n
DO n = Data Out from column n
Burst Length = 4 in the case shown.
2 subsequent elements of Data Out are provided in the programmed order following DO n.
The burst is terminated after the 3rd data element.
Figure 21 Terminating a READ Burst
= Don't Care
3.4.5.2 Clock Suspend Mode for READ Cycles
Clock suspend mode allows to extend any read burst in progress by a variable number of clock cycles. As long as
CKE is registered LOW, the following internal clock pulse(s) will be ignored and data on DQ will remain driven, as
shown in Figure 22.
CLK
CKE
internal
clock
Command
READ
Address
Ba A,
Col n
NOP
DQ
NOP
t_CSL
DO n
NOP
t_CSL
DO n+1
Ba A, Col n etc. = Bank A, Column n etc.
DO n etc. = Data Out from column n etc.
CL = 2 in the case shown
Clock suspend latency t_CSL is 1 clock cycle
Figure 22 Clock Suspend Mode for READ Bursts
NOP
NOP
t_CSL
DO n+1
DO n+2
= Don't Care
Data Sheet
26
Rev. 1.3, 2004-04
10212003-BSPE-77OL