MB81N643289 Datasheet, PDF (40/64 Pages) Fujitsu Component Limited. – 8 x 256K x 32 BIT DOUBLE DATA RATE FCRAMTM

MB81N643289-50/-60 Preliminary (AE1E)
s TIMING DIAGRAMS
TIMING DIAGRAM – 1 : PAGE MODE READ
(Timing assumes Same Bank Access)
CLK
CLK
Command ACTV
lRCD
lCCD
lRPL
tPCL
NOP
RD RD RD PC NOP ACTV
tRAS
NOP
RDA
NOP
DQ
(Output) ^Hi-Z
@CL = 3
DQS
(Output) ^Hi-Z
@CL = 3
Q1 Q2 Q1 Q2 Q1 Q2
CL
CL
CL
DQ
(Output) ^Hi-Z
@CL = 2
DQS
(Output) ^Hi-Z
@CL = 2
Q1 Q2 Q1 Q2 Q1 Q2
CL
CL
CL
Notes: 1.
2.
3.
4.
lRCD :Latency of ACTV to Read command input delay.
lCCD :Latency of CAS to CAS delay (Page cycle time).
lRPL :Latency of Read command to Page Close lead time.
tPCL :Page Close to next command lead time.
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