I.MX27L_11 Datasheet, PDF (97/152 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor Multiple clock and power domains

Electrical Characteristics
BCLK
WE1
ADDR/
M_DATA ^{Last Valid Addr}
CS[x]
WE3
RW
LBA
WE5
WE11
OE
EB[y]
WE9
Address V1
WE2
Write Data
WE13
WE12
Write
WE14
WE4
WE6
WE10
Figure 58. Muxed A/D Mode Timing Diagram for Asynchronous
Write Access—WSC=7, LBA=1, LBN=1, LAH=1
BCLK
WE1
ADDR/
M_DATA ^{Last Valid Addr}
CS[x]
WE3
RW
LBA
OE
EB[y]
WE9
Address V1
WE2
WE11
WE12
WE7
WE16
Read Data
WE15
WE4
WE8
WE10
Figure 59. Muxed A/D Mode Timing Diagram for Asynchronous
Read Access—WSC=7, LBA=1, LBN=1, LAH=1, OEA=7
4.3.12.1 WEIM Synchronous Mode Sample Point
i.MX27 and i.MX27L Data Sheet, Rev. 1.7
Freescale Semiconductor
97