I.MX27L_11 Datasheet, PDF (45/152 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor Multiple clock and power domains

Electrical Characteristics
Table 13. DDR (Double Data Rate) I/O Pads DC Electrical Parameters
Parameter
Symbol Test Conditions
Min
Typical
Max
Units
High-level output voltage
V_OH
I_OH = -1 mA
NV_{DD_DDR}
—
–0.08
—
V
Low-level output voltage
High-level output current
I_OH = specified Drive 0.8*NV_{DD_}
—
DDR
—
V
V_OL
I_OL = 1 mA
—
—
0.08
V
I_OL = specified Drive
—
—
0.2*NV_{DD_} V
DDR
I_OH
V_OH=0.8*NV_{DD_DDR}
—
Normal
–3.6
High
Max High¹
DDR Drive¹
–7.2
–10.8
–14.4
—
mA
Low-level output current
I_OL
V_OL=0.2*NV_{DD_DDR}
—
Normal
3.6
High
7.2
Max High¹
10.8
DDR Drive¹
14.4
—
mA
Low-level input current
High-level input current
Tri-state current
I_IL
V_I = 0
—
1.7
I_IH
V_I = NV_{DD_DDR}
—
I_Z
V_I = NV_{DD_DDR} or 0
—
1.7
I/O = high Z
2
μA
2
μA
2
μA
Note:
1 _{Max High and DDR Drive strengths should be avoided due to excessive overshoot and ringing.}
4.2.1.2 AC Electrical Characteristics
Figure 2 depicts the load circuit for output pads. Figure 3 depicts the output pad transition time waveform.
The range of operating conditions appear in Table 14 for slow general I/O, Table 15 for fast general I/O,
and Table 16 for DDR I/O (unless otherwise noted).
From Output
Under Test
Test Point
CL
CL includes package, probe and jig capacitance
Figure 2. Load Circuit for Output Pad
Output (at pad)
80%
20%
PA1
PA1
Figure 3. Output Pad Transition Time Waveform
NVDD
80%
20%
0V
i.MX27 and i.MX27L Data Sheet, Rev. 1.7
Freescale Semiconductor
45