MC908JL8CDWE Datasheet, PDF (89/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Functional Description
Table 7-2. Monitor Mode Vector Differences
Functions
Modes
COP
Reset
Vector
High
Reset
Vector
Low
Break
Vector
High
Break
Vector
Low
SWI
Vector
High
SWI
Vector
Low
User
Monitor
Enabled
Disabled⁽¹⁾
$FFFE
$FEFE
$FFFF
$FEFF
$FFFC
$FEFC
$FFFD
$FEFD
$FFFC
$FEFC
$FFFD
$FEFD
Notes:
1. If the high voltage (V_TST) is removed from the IRQ pin or the RST pin, the SIM asserts
its COP enable output. The COP is a mask option enabled or disabled by the COPD bit
in the configuration register.
When the host computer has completed downloading code into the MCU RAM, the host then sends a
RUN command, which executes an RTI, which sends control to the address on the stack pointer.
7.3.2 Baud Rate
The communication baud rate is dependant on oscillator frequency. The state of PTB3 also affects baud
rate if entry to monitor mode is by IRQ = V_TST. When PTB3 is high, the divide by ratio is 1024. If the PTB3
pin is at logic zero upon entry into monitor mode, the divide by ratio is 512.
Table 7-3. Monitor Baud Rate Selection
Monitor Mode
Entry By:
IRQ = V_TST
Blank reset vector,
IRQ = V_DD
OSC1 Clock
Frequency
4.9152 MHz
9.8304 MHz
4.9152 MHz
9.8304 MHz
4.9152 MHz
PTB3
0
1
1
X
X
Baud Rate
9600 bps
9600 bps
4800 bps
9600 bps
4800 bps
7.3.3 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See Figure 7-3 and Figure 7-4.)
START
BIT BIT 0
BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
Figure 7-3. Monitor Data Format
NEXT
START
STOP BIT
BIT
$A5
BREAK
START
BIT
START
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP
BIT
STOP
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT
Figure 7-4. Sample Monitor Waveforms
NEXT
START
BIT
NEXT
START
BIT
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Freescale Semiconductor
89