MC908JL8CDWE Datasheet, PDF (151/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 11
Input/Output (I/O) Ports
11.1 Introduction
Twenty six (26) bidirectional input-output (I/O) pins form four parallel ports. All I/O pins are programmable
as inputs or outputs.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Addr.
$0000
$0001
$0003
$0004
$0005
$0007
$0008
$000A
$000C
Register Name
Read:
Port A Data Register (PTA) Write:
Reset:
Read:
Port B Data Register (PTB) Write:
Reset:
Read:
Port D Data Register (PTD) Write:
Reset:
Read:
Data Direction Register A
(DDRA)
Write:
Reset:
Read:
Data Direction Register B
(DDRB)
Write:
Reset:
Read:
Data Direction Register D
(DDRD)
Write:
Reset:
Read:
Port E Data Register
(PTE)
Write:
Reset:
Read:
Port D Control Register
(PDCR)
Write:
Reset:
Read:
Data Direction Register E
(DDRE)
Write:
Reset:
Bit 7
PTA7
PTB7
PTD7
DDRA7
0
DDRB7
0
DDRD7
0
0
0
0
6
PTA6
PTB6
PTD6
DDRA6
0
DDRB6
0
DDRD6
0
0
0
0
5
PTA5
PTB5
PTD5
DDRA5
0
DDRB5
0
DDRD5
0
0
0
0
4
3
2
1
Bit 0
PTA4
PTA3
PTA2
PTA1
PTA0
Unaffected by reset
PTB4
PTB3
PTB2
PTB1
PTB0
Unaffected by reset
PTD4
PTD3
PTD2
PTD1
PTD0
Unaffected by reset
DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
0
0
0
0
0
DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
0
0
0
0
0
DDRD4 DDRD3 DDRD2 DDRD1 DDRD0
0
0
0
0
0
PTE1
PTE0
Unaffected by reset
0
SLOWD7 SLOWD6 PTDPU7 PTDPU6
0
0
0
0
0
DDRE1 DDRE0
0
0
0
0
0
Figure 11-1. I/O Port Register Summary
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Freescale Semiconductor
151