MC908JL8CDWE Datasheet, PDF (182/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Break Module (BREAK)
Address: $FE0D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 16-5. Break Address Register Low (BRKL)
16.4.3 Break Status Register
The break status register contains a flag to indicate that a break caused an exit from stop or wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
Write:
R
R
R
R
R
Note⁽¹⁾
R
Reset:
0
R = Reserved
1. Writing a logic zero clears SBSW.
Figure 16-6. Break Status Register (BSR)
SBSW — SIM Break Stop/Wait
This status bit is useful in applications requiring a return to wait or stop mode after exiting from a break
interrupt. Clear SBSW by writing a logic zero to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it. The following code is an example of this.
; This code works if the H register has been pushed onto the stack in the break
; service routine software. This code should be executed at the end of the
; break service routine software.
HIBYTE EQU 5
LOBYTE EQU 6
;
If not SBSW, do RTI
BRCLR SBSW,BSR, RETURN ; See if wait mode or stop mode was exited
; by break.
TST LOBYTE,SP
; If RETURNLO is not zero,
BNE DOLO
; then just decrement low byte.
DEC HIBYTE,SP
; Else deal with high byte, too.
DOLO DEC LOBYTE,SP
; Point to WAIT/STOP opcode.
RETURN PULH
RTI
; Restore H register.
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
182
Freescale Semiconductor