MC908JL8CDWE Datasheet, PDF (31/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM
Addr.
Register Name
Bit 7
6
5
4
3
Read: IF6
IF5
IF4
IF3
0
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
Read: IF14
IF13
IF12
IF11
0
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
Read: 0
0
0
0
0
$FE06
Interrupt Status Register 3
(INT3)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
$FE07
Read:
Reserved Write:
R
R
R
R
R
2
1
Bit 0
IF1
0
0
R
R
R
0
0
0
0
IF8
IF7
R
R
R
0
0
0
0
0
IF15
R
R
R
0
0
0
R
R
R
Read: 0
0
0
$FE08
FLASH Control Register
(FLCR)
Write:
Reset: 0
0
0
$FE09
↓
$FE0B
Read:
Reserved Write:
R
R
R
$FE0C
Break Address High ^Read:
Register Write:
Bit15
Bit14
Bit13
(BRKH) _{Reset: 0}
0
0
$FE0D
Break Address low ^Read:
Register Write:
Bit7
Bit6
Bit5
(BRKL) _{Reset: 0}
0
0
$FE0E
Break Status and Control ^Read:
Register Write:
BRKE
BRKA
0
(BRKSCR) _{Reset: 0}
0
0
0
HVEN MASS ERASE PGM
0
0
0
0
0
R
R
R
R
R
Bit12
Bit11
Bit10
Bit9
Bit8
0
0
0
0
0
Bit4
Bit3
Bit2
Bit1
Bit0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
$FFCF
FLASH Block Protect ^Read:
Register Write:
(FLBPR)^# _Reset:
BPR7
$FFD0
Read:
Mask Option Register
(MOR)^#
Write:
OSCSEL
Reset:
# Non-volatile FLASH registers; write by programming.
BPR6
R
BPR5
BPR4
BPR3
BPR2
Unaffected by reset; $FF when blank
R
R
R
R
Unaffected by reset; $FF when blank
BPR1
R
BPR0
R
$FFFF
Read:
COP Control Register
(COPCTL)
Write:
Reset:
U = Unaffected
X = Indeterminate
Low byte of reset vector
Writing clears COP counter (any value)
Unaffected by reset
= Unimplemented
R
= Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 5)
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Freescale Semiconductor
31