MC908JL8CDWE Datasheet, PDF (86/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM (MON)
0.1 µF
V_DD
EXT OSC (50% DUTY)
V_DD
0.1 µF
OSC1
RST
HC908JL8
V_DD
V_SS
EXT OSC CONNECTION TO OSC1, WITH OSC2
UNCONNECTED, CAN REPLACE XTAL CIRCUIT.
9.8304 MHz
20 pF
1 µF
1 µF
DB9
2
3
1 _C1+
+
3 _C1–
4 _C2+
+
5 _C2–
7
8
MAX232
V_CC ¹⁶
GND ¹⁵
2
V+
V– ⁶
10
9
V_DD
+
1 µF
1 µF
+
V_TST
1 µF
+
74HC125
6
5
74HC125
2
3
4
XTAL CIRCUIT
V_{DD 1 k}
8.5 V
10 k
5
1
20 pF
A
SW1
(SEE NOTE 1)
B
V_DD
10 k
V_DD
10 k
V_DD
10 k
NOTES:
1. Monitor mode entry method:
SW1: Position A — High voltage entry (V_TST)
Bus clock depends on SW2.
SW1: Position B — Reset vector must be blank ($FFFE = $FFFF = $FF)
Bus clock = OSC1 ÷ 4.
2. Affects high voltage entry to monitor mode only (SW1 at position A):
SW2: Position C — Bus clock = OSC1 ÷ 4
SW2: Position D — Bus clock = OSC1 ÷ 2
5. See Table 17-4 for V_TST voltage level requirements.
C
(SEE NOTE 2)
D
10 k
SW2
10 k
Figure 7-1. Monitor Mode Circuit
OSC1
OSC2
IRQ
PTB0
PTB1
PTB3
PTB2
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
86
Freescale Semiconductor