MC908JL8CDWE Datasheet, PDF (62/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
STOP/WAIT
CONTROL
SIM
COUNTER
VDD
INTERNAL
PULL-UP
÷2
CLOCK
CONTROL
CLOCK GENERATORS
RESET
PIN LOGIC
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSCILLATOR)
COP CLOCK
ICLK (FROM OSCILLATOR)
OSCOUT (FROM OSCILLATOR)
INTERNAL CLOCKS
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP TIMEOUT (FROM COP MODULE)
USB RESET (FROM USB MODULE)
RESET
INTERRUPT CONTROL
AND PRIORITY DECODE
Figure 5-1. SIM Block Diagram
INTERRUPT SOURCES
CPU INTERFACE
Addr.
Register Name
Bit 7
6
Read:
$FE00 Break Status Register (BSR) Write:
R
R
Reset: 0
0
Note: Writing a logic 0 clears SBSW.
Read: POR
PIN
$FE01 Reset Status Register (RSR) Write:
POR: 1
0
$FE02
Read:
Reserved Write:
R
R
Reset:
$FE03
Break Flag Control ^Read:
Register Write:
BCFE
R
(BFCR) _{Reset: 0}
5
4
3
2
1
Bit 0
R
R
R
R
SBSW
NOTE
R
0
0
0
0
0
0
COP
ILOP
ILAD MODRST LVI
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
R
R
R
R
Figure 5-2. SIM I/O Register Summary
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
62
Freescale Semiconductor