MC908JL8CDWE Datasheet, PDF (38/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
2.11 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made to protect blocks of memory from unintentional erase or program operations
due to system malfunction. This protection is done by use of a FLASH block protect register (FLBPR).
The FLBPR determines the range of the FLASH memory which is to be protected. The range of the
protected area starts from a location defined by FLBPR and ends to the bottom of the FLASH memory
($FFFF). When the memory is protected, the HVEN bit cannot be set in either erase or program
operations.
NOTE
In performing a program or erase operation, the FLASH block protect register must be read after setting
the PGM or ERASE bit and before asserting the HVEN bit
When the FLBPR is program with all 0’s, the entire memory is protected from being programmed and
erased. When all the bits are erased
(all 1’s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory, address ranges as shown in
2.12 FLASH Block Protect Register. Once the FLBPR is programmed with a value other than $FF, any
erase or program of the FLBPR or the protected block of FLASH memory is prohibited. The FLBPR itself
can be erased or programmed only with an external voltage, V_TST, present on the IRQ pin. This voltage
also allows entry from reset into the monitor mode.
2.12 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte within the FLASH memory, and
therefore can only be written during a programming sequence of the FLASH memory. The value in this
register determines the starting location of the protected range within the FLASH memory.
Address: $FFCF
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset:
Unaffected by reset; $FF when blank
Non-volatile FLASH register; write by programming.
Figure 2-5. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
BPR[7:0] — FLASH Block Protect Bits
BPR[7:0] represent bits [13:6] of a 16-bit memory address. Bits [15:14] are logic 1’s and bits [5:0] are
logic 0’s.
Start address of FLASH block protect 1 1
16-bit memory address
000000
BPR[7:0]
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
38
Freescale Semiconductor