MC908JL8CDWE Datasheet, PDF (155/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port A
11.2.3 Port A Input Pull-Up Enable Registers
The port A input pull-up enable registers contain a software configurable pull-up device for each of the
eight port A pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRAx be configured as input. Each pull-up device is automatically disabled when its
corresponding DDRAx bit is configured as output.
Address: $000D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
PTA6EN
0
PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
0
0
0
0
0
0
0
Figure 11-5. Port A Input Pull-up Enable Register (PTAPUE)
Address: $000E
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTAPUE7
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 11-6. PTA7 Input Pull-up Enable Register (PTA7PUE)
PTA6EN — Enable PTA6 on OSC2
This read/write bit configures the OSC2 pin function when RC oscillator option is selected. This bit has
no effect for XTAL oscillator option.
1 = OSC2 pin configured for PTA6 I/O, and has all the interrupt and pull-up functions
0 = OSC2 pin outputs the RC oscillator clock (RCCLK)
PTAPUE[7:0] — Port A Input Pull-up Enable Bits
These read/write bits are software programmable to enable pull-up devices on port A pins.
1 = Corresponding port A pin configured to have internal pull-up if its DDRA bit is set to 0
0 = Pull-up device is disconnected on the corresponding port A pin regardless of the state of its
DDRA bit
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Freescale Semiconductor
155