MC908JL8CDWE Datasheet, PDF (72/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
5.5.2.2 Interrupt Status Register 2
Address: $FE05
Bit 7
6
5
4
3
2
1
Bit 0
Read: IF14
IF13
IF12
IF11
0
0
IF8
IF7
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Figure 5-13. Interrupt Status Register 2 (INT2)
IF7, IF8, IF11 to F14 — Interrupt Flags
This flag indicates the presence of interrupt requests from the sources shown in Table 5-3.
1 = Interrupt request present
0 = No interrupt request present
Bit 2 and 3 — Always read 0
5.5.2.3 Interrupt Status Register 3
Address: $FE06
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
0
IF15
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Figure 5-14. Interrupt Status Register 3 (INT3)
IF15 — Interrupt Flags
These flags indicate the presence of interrupt requests from the sources shown in Table 5-3.
1 = Interrupt request present
0 = No interrupt request present
Bit 1 to 7 — Always read 0
5.5.3 Reset
All reset sources always have equal and highest priority and cannot be arbitrated.
5.5.4 Break Interrupts
The break module can stop normal program flow at a software-programmable break point by asserting its
break interrupt output. (See Chapter 16 Break Module (BREAK).) The SIM puts the CPU into the break
state by forcing it to the SWI vector location. Refer to the break interrupt subsection of each module to
see how each module is affected by the break state.
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
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Freescale Semiconductor