MC908JL8CDWE Datasheet, PDF (63/212 Pages) Freescale Semiconductor, Inc – Microcontrollers

SIM Bus Clock Control and Generation
Read: IF6
IF5
IF4
IF3
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
Reset: 0
0
0
0
Read: IF14
IF13
IF12
IF11
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
Reset: 0
0
0
0
Read: 0
0
0
0
$FE06
Interrupt Status Register 3
(INT3)
Write:
R
R
R
R
Reset: 0
0
0
0
= Unimplemented
0
IF1
0
0
R
R
R
R
0
0
0
0
0
0
IF8
IF7
R
R
R
R
0
0
0
0
0
0
0
IF15
R
R
R
R
0
0
0
0
R = Reserved
Figure 5-2. SIM I/O Register Summary
5.2 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, OSCOUT, as shown in Figure 5-3.
From
OSCILLATOR
From
OSCILLATOR
ICLK
OSCOUT
SIM COUNTER
÷2
BUS CLOCK
GENERATORS
OSCOUT is OSC frequency divided by 2
SIM
Figure 5-3. SIM Clock Signals
5.2.1 Bus Timing
In user mode, the internal bus frequency is the oscillator frequency divided by four.
5.2.2 Clock Start-Up from POR or LVI Reset
When the power-on reset module or the low-voltage inhibit module generates a reset, the clocks to the
CPU and peripherals are inactive and held in an inactive phase until after the 4096 ICLK cycle POR
timeout has completed. The RST pin is driven low by the SIM during this entire period. The IBUS clocks
start upon completion of the timeout.
5.2.3 Clocks in Stop Mode and Wait Mode
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows ICLK to clock the SIM counter.
The CPU and peripheral clocks do not become active until after the stop delay time-out. This time-out is
selectable as 4096 or 32 ICLK cycles. (See 5.6.2 Stop Mode.)
In wait mode, the CPU clocks are inactive. The SIM also produces two sets of clocks for other modules.
Refer to the wait mode subsection of each module to see if the module is active or inactive in wait mode.
Some modules can be programmed to be active in wait mode.
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Freescale Semiconductor
63