MC908AB32CFUE Datasheet, PDF (42/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
2.4 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on MCU
operation. In the Figure 2-1 and in register figures in this document,
reserved locations are marked with the word Reserved or with the
letter R.
2.5 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page
$0000–$004F. Additional I/O registers have the following addresses:
• $FE00; SIM break status register, SBSR
• $FE01; SIM reset status register, SRSR
• $FE03; SIM break flag control register, SBFCR
• $FE08; FLASH control register, FLCR
• $FE0C; break address register high, BRKH
• $FE0D; break address register low, BRKL
• $FE0E; break status and control register, BRKSCR
• $FE0F; LVI status register, LVISR
• $FE10; EEPROM divider non-volatile register high, EEDIVHNVR
• $FE11; EEPROM divider non-volatile register low, EEDIVLNVR
• $FE1A; EEPROM timebase divider register high, EEDIVH
• $FE1B; EEPROM timebase divider register low, EEDIVL
• $FE1C; EEPROM non-volatile register, EENVR
• $FE1D; EEPROM control register, EECR
• $FE1F; EEPROM array configuration register, EEACR
• $FF7E; FLASH block protect register, FLBPR
• $FFFF; COP control register, COPCTL
Data registers are shown in Figure 2-2, Table 2-1 is a list of vector
locations.
Technical Data
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Memory Map
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor