MC908AB32CFUE Datasheet, PDF (303/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface Module (SPI)
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. (See 16.8.2 Mode Fault Error.) For the state of the
SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the port data register. (See
Table 16-3.)
Table 16-3. SPI Configuration
SPE SPMSTR MODFEN
0
X⁽¹⁾
X
1
0
X
1
1
0
1
1
1
Note 1. X = Don’t care
SPI Configuration
Not enabled
Slave
Master without MODF
Master with MODF
State of SS Logic
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
16.13.5 CGND (Clock Ground)
CGND is the ground return for the serial clock pin, SPSCK, and the
ground for the port output buffers. It is internally connected to V_SS as
shown in Table 16-1.
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor
Serial Peripheral Interface Module (SPI)
Technical Data
303