MC908AB32CFUE Datasheet, PDF (218/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module B (TIMB)
OVERFLOW
OVERFLOW
PERIOD
TBCHx
OVERFLOW
OVERFLOW
OVERFLOW
CHxMAX
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 12-13. CHxMAX Latency
12.10.5 TIMB Channel Registers
These read/write registers contain the captured TIMB counter value of
the input capture function or the output compare value of the output
compare function. The state of the TIMB channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIMB channel x registers (TBCHxH) inhibits input captures until the low
byte (TBCHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of
the TIMB channel x registers (TBCHxH) inhibits output compares until
the low byte (TBCHxL) is written.
Address: $0046
Bit 7
6
Read:
Bit 15
14
Write:
Reset:
5
4
3
2
13
12
11
10
Indeterminate after reset
1
Bit 0
9
Bit 8
Figure 12-14. TIMB Channel 0 Register High (TBCH0H)
Address: $0047
Bit 7
6
Read:
Bit 7
6
Write:
Reset:
5
4
3
2
5
4
3
2
Indeterminate after reset
1
Bit 0
1
Bit 0
Figure 12-15. TIMB Channel 0 Register Low (TBCH0L)
Technical Data
218
Timer Interface Module B (TIMB)
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor