MC908AB32CFUE Datasheet, PDF (290/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface Module (SPI)
BUS
CLOCK
WRITE
TO SPDR
INITIATION DELAY
MOSI
SPSCK
CPHA = 1
SPSCK
CPHA = 0
SPSCK CYCLE
NUMBER
MSB
BIT 6
BIT 5
1
2
3
INITIATION DELAY FROM WRITE SPDR TO TRANSFER BEGIN
BUS
CLOCK
WRITE
TO SPDR
BUS
CLOCK
EARLIEST
SPSCK = INTERNAL CLOCK ÷ 2;
2 POSSIBLE START POINTS
WRITE
LATEST
TO SPDR
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
SPSCK = INTERNAL CLOCK ÷ 8;
8 POSSIBLE START POINTS
LATEST
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
SPSCK = INTERNAL CLOCK ÷ 32;
32 POSSIBLE START POINTS
LATEST
EARLIEST
SPSCK = INTERNAL CLOCK ÷ 128;
128 POSSIBLE START POINTS
LATEST
Figure 16-7. Transmission Start Delay (Master)
Technical Data
290
Serial Peripheral Interface Module (SPI)
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor