MC908AB32CFUE Datasheet, PDF (324/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
17.6.2 Data Direction Register D (DDRD)
Data direction register D determines whether each port D pin is an input
or an output. Writing a logic 1 to a DDRD bit enables the output buffer for
the corresponding port D pin; a logic 0 disables the output buffer.
Address: $0007
Bit 7
Read:
DDRD7
Write:
Reset: 0
6
DDRD6
0
5
DDRD5
0
4
DDRD4
0
3
DDRD3
0
2
DDRD2
0
1
DDRD1
0
Bit 0
DDRD0
0
Figure 17-12. Data Direction Register D (DDRD)
DDRD[7:0] — Data Direction Register D Bits
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
NOTE:
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1. Figure 17-13 shows
the port D I/O logic.
READ DDRD ($0007)
V_DD
WRITE DDRD ($0007)
RESET
WRITE PTD ($0003)
DDRDx
PTDx
PTDPUEx
PTDx
READ PTD ($0003)
Technical Data
324
PTD6 to TACLK of TIMA
PTD4 to TBCLK of TIMB
Figure 17-13. Port D I/O Circuit
Input/Output (I/O) Ports
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor