MC908AB32CFUE Datasheet, PDF (223/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Programmable Interrupt Timer (PIT)
Addr.
Register Name
Bit 7
6
5
4
3
PIT Status and Control ^{Read: POF}
POIE PSTOP
0
0
$004B
Register Write: 0
PRST
(PSC) _{Reset: 0}
0
1
0
0
Read: Bit 15
14
13
12
11
$004C
PIT Counter Register High
(PCNTH)
Write:
Reset: 0
0
0
0
0
Read: Bit 7
6
5
4
3
$004D
PIT Counter Register Low
(PCNTL)
Write:
Reset: 0
0
0
0
0
PIT Counter Modulo ^Read: _{Bit 15}
14
13
12
11
$004E
Register High Write:
(PMODH) _{Reset: 1}
1
1
1
1
PIT Counter Modulo ^Read: _{Bit 7}
6
5
4
3
$004F
Register Low Write:
(PMODL) _{Reset: 1}
1
1
1
1
= Unimplemented
Figure 13-2. PIT I/O Register Summary
2
PPS2
0
10
1
PPS1
0
9
Bit 0
PPS0
0
Bit 8
0
0
0
2
1
Bit 0
0
0
0
10
9
Bit 8
1
1
1
2
1
Bit 0
1
1
1
13.4.1 PIT Counter Prescaler
The clock source can be one of the seven prescaler outputs. The
prescaler generates seven clock rates from the internal bus clock. The
prescaler select bits, PPS[2:0] in the status and control register select
the PIT clock source.
The value in the PIT counter modulo registers and the selected prescaler
output determines the frequency of the Periodic Interrupt. The PIT
overflow flag (POF) is set when the PIT counter value rolls over to $0000
after matching the value in the PIT counter modulo registers. The PIT
interrupt enable bit, POIE, enables PIT overflow CPU interrupt requests.
POF and POIE are in the PIT status and control register.
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor
Programmable Interrupt Timer (PIT)
Technical Data
223