MC908AB32CFUE Datasheet, PDF (356/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Computer Operating Properly (COP)
20.4.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
20.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
20.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register 1. (See Figure 20-2.)
20.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register 1. (See Figure 20-2.)
Address: $001F
Bit 7
6
5
4
3
2
1
Read:
LVISTOP R LVIRSTD LVIPWRD SSREC COPRS STOP
Write:
Reset: 0
0
0
0
0
0
0
R = Reserved
Figure 20-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS.
1 = COP timeout period is 2¹⁸ – 2⁴ CGMXCLK cycles
0 = COP timeout period is 2¹³ – 2⁴ CGMXCLK cycles
COPD — COP Disable Bit
COPD disables the COP module.
1 = COP module disabled
0 = COP module enabled
Technical Data
356
Computer Operating Properly (COP)
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor