MC908AB32CFUE Datasheet, PDF (321/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
PTC[5:0] — Port C Data Bits
These read/write bits are software programmable. Data direction of
each port C pin is under the control of the corresponding bit in data
direction register C. Reset has no effect on port C data.
MCLK — T12 System Clock
The system clock is driven out of the PTC2 pin when MCLKEN is set.
17.5.2 Data Direction Register C (DDRC)
Data direction register C determines whether each port C pin is an input
or an output. Writing a logic 1 to a DDRC bit enables the output buffer for
the corresponding port C pin; a logic 0 disables the output buffer.
Address: $0006
Bit 7
6
5
4
3
2
1
Read:
0
MCLKEN
Write:
DDRC5 DDRC4 DDRC3 DDRC2 DDRC1
Reset: 0
0
0
0
0
0
0
Figure 17-9. Data Direction Register B (DDRB)
Bit 0
DDRC0
0
MCLKEN — T12 System Clock Enable Bit
This read/write bit enables MCLK to be an output signal on PTC2 pin.
Reset clears MCLKEN.
1 = PTC2 pin configured as MCLK output
0 = PTC2 pin configured as standard I/O pin
DDRC[5:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears
DDRC[5:0], configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE:
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1. Figure 17-10 shows
the port C I/O logic.
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor
Input/Output (I/O) Ports
Technical Data
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