MC908AB32CFUE Datasheet, PDF (343/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

External Interrupt (IRQ)
18.5 IRQ Status and Control Register (ISCR)
The IRQ Status and Control Register (ISCR) controls and monitors
operation of the IRQ module. The ISCR has the following functions:
• Shows the state of the IRQ flag
• Clears the IRQ latch
• Masks IRQ interrupt request
• Controls triggering sensitivity of the IRQ interrupt pin
Address: $001A
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
IRQF
0
IMASK MODE
Write:
ACK
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 18-3. IRQ Status and Control Register (ISCR)
IRQF — IRQ Flag
This read-only status bit is high when the IRQ interrupt is pending.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
ACK — IRQ Interrupt Request Acknowledge Bit
Writing a logic 1 to this write-only bit clears the IRQ latch. ACK always
reads as logic 0. Reset clears ACK.
IMASK — IRQ Interrupt Mask Bit
Writing a logic 1 to this read/write bit disables IRQ interrupt requests.
Reset clears IMASK.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
MODE — IRQ Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ pin.
Reset clears MODE.
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor
External Interrupt (IRQ)
Technical Data
343