MC908AB32CFUE Datasheet, PDF (103/392 Pages) Freescale Semiconductor, Inc – Microcontrollers

Central Processor Unit (CPU)
Table 7-1. Instruction Set Summary (Continued)
Source
Form
Operation
LSR opr
LSRA
LSRX
LSR opr,X
LSR ,X
LSR opr,SP
MOV opr,opr
MOV opr,X+
MOV #opr,opr
MOV X+,opr
MUL
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NEG opr,SP
NOP
NSA
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ORA opr,SP
ORA opr,SP
PSHA
PSHH
PSHX
PULA
PULH
PULX
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROL opr,SP
Logical Shift Right
Move
Unsigned multiply
Negate (Two’s Complement)
No Operation
Nibble Swap A
Inclusive OR A and M
Push A onto Stack
Push H onto Stack
Push X onto Stack
Pull A from Stack
Pull H from Stack
Pull X from Stack
Rotate Left through Carry
Description
0
b7
C
b0
(M)_Destination ← (M)_Source
H:X ← (H:X) + 1 (IX+D, DIX+)
X:A ← (X) × (A)
M ← –(M) = $00 – (M)
A ← –(A) = $00 – (A)
X ← –(X) = $00 – (X)
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
None
A ← (A[3:0]:A[7:4])
A ← (A) | (M)
Push (A); SP ← (SP) – 1
Push (H); SP ← (SP) – 1
Push (X); SP ← (SP) – 1
SP ← (SP + 1); Pull (A)
SP ← (SP + 1); Pull (H)
SP ← (SP + 1); Pull (X)
C
b7
b0
Effect on
CCR
VH I NZC
DIR
INH
↕
–
–
0↕
↕
INH
IX1
IX
SP1
DD
0 – –↕
↕
–
DIX+
IMD
IX+D
– 0 – – – 0 INH
DIR
INH
↕
–
–↕
↕
↕
INH
IX1
IX
SP1
– – – – – – INH
– – – – – – INH
IMM
DIR
EXT
0 – –↕
↕
–
IX2
IX1
IX
SP1
SP2
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
DIR
INH
↕
–
–↕
↕
↕
INH
IX1
IX
SP1
34 dd 4
44
1
54
1
64 ff
4
74
3
9E64 ff
5
4E dd dd 5
5E dd 4
6E ii dd 4
7E dd 4
42
5
30 dd 4
40
1
50
1
60 ff
4
70
3
9E60 ff
5
9D
1
62
3
AA ii
2
BA dd 3
CA hh ll 4
DA ee ff 4
EA ff
3
FA
2
9EEA ff
4
9EDA ee ff 5
87
2
8B
2
89
2
86
2
8A
2
88
2
39 dd 4
49
1
59
1
69 ff
4
79
3
9E69 ff
5
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor
Central Processor Unit (CPU)
Technical Data
103