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MC9S08GT16A Datasheet, PDF (35/300 Pages) Freescale Semiconductor, Inc – Microcontrollers
Modes of Operation
3.5 Stop Modes
One of three stop modes is entered upon execution of a STOP instruction when the STOPE bit in the
system option register is set. In all stop modes, all internal clocks are halted. If the STOPE bit is not set
when the CPU executes a STOP instruction, the MCU will not enter any of the stop modes and an illegal
opcode reset is forced. The stop modes are selected by setting the appropriate bits in SPMSC2.
Table 3-1 summarizes the behavior of the MCU in each of the stop modes.
Table 3-1. Stop Mode Behavior
Mode
Stop1
Stop2
PDC
PPDC
CPU, Digital
Peripherals,
FLASH
RAM
1
0
1
1
Off
Off
Off
Standby
ICG
ATD
Regulator
Off
Disabled1
Off
Off
Disabled Standby
Stop3
0
Don’t
Standby
Standby
Off2
Disabled
care
1 Either ATD stop mode or power-down mode depending on the state of ATDPU.
2 Crystal oscillator can be configured to run in stop3. Please see the ICG registers.
Standby
I/O Pins
Reset
States
held
States
held
RTI
Off
Optionally on
Optionally on
3.5.1 Stop1 Mode
The stop1 mode provides the lowest possible standby power consumption by causing the internal circuitry
of the MCU to be powered down. Stop1 can be entered only if the LVD circuit is not enabled in stop modes
(either LVDE or LVDSE not set).
When the MCU is in stop1 mode, all internal circuits that are powered from the voltage regulator are turned
off. The voltage regulator is in a low-power standby state, as is the ATD.
Exit from stop1 is performed by asserting either of the wake-up pins on the MCU: RESET or IRQ. IRQ is
always an active low input when the MCU is in stop1, regardless of how it was configured before entering
stop1.
Entering stop1 mode automatically asserts LVD. Stop1 cannot be exited until VDD > VLVDH/L rising (VDD
must rise above the LVI rearm voltage).
Upon wake-up from stop1 mode, the MCU will start up as from a power-on reset (POR). The CPU will
take the reset vector.
3.5.2 Stop2 Mode
The stop2 mode provides very low standby power consumption and maintains the contents of RAM and
the current state of all of the I/O pins. Stop2 can be entered only if the LVD circuit is not enabled in stop
modes (either LVDE or LVDSE not set).
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Freescale Semiconductor
35