MC9S08GT16A Datasheet, PDF (17/300 Pages) Freescale Semiconductor, Inc – Microcontrollers

Section Number
Title
Page
14.1.2.2 Power Down Mode .......................................................................................223
14.1.3 Block Diagram ................................................................................................................223
14.2 External Signal Description ..........................................................................................................224
14.2.1 ADP7–ADP0 — Channel Input Pins ..............................................................................225
14.2.2 V_REFH, V_REFL — ATD Reference Pins .........................................................................225
14.2.3 V_DDAD, V_SSAD — ATD Supply Pins ............................................................................225
14.3 Register Definition ........................................................................................................................225
14.3.1 ATD Control (ATDC) .....................................................................................................225
14.3.2 ATD Status and Control (ATDSC) ..................................................................................228
14.3.3 ATD Result Data (ATDRH, ATDRL) .............................................................................229
14.3.4 ATD Pin Enable (ATDPE) ..............................................................................................229
14.4 Functional Description ..................................................................................................................230
14.4.1 Mode Control ..................................................................................................................230
14.4.2 Sample and Hold .............................................................................................................230
14.4.3 Analog Input Multiplexer ................................................................................................232
14.4.4 ATD Module Accuracy Definitions ................................................................................232
14.5 Resets ............................................................................................................................................235
14.6 Interrupts .......................................................................................................................................235
Chapter 15
Development Support
15.1 Introduction ...................................................................................................................................237
15.1.1 Features ...........................................................................................................................238
15.2 Background Debug Controller (BDC) ..........................................................................................238
15.2.1 BKGD Pin Description ...................................................................................................239
15.2.2 Communication Details ..................................................................................................240
15.2.3 BDC Commands .............................................................................................................244
15.2.4 BDC Hardware Breakpoint .............................................................................................246
15.3 On-Chip Debug System (DBG) ....................................................................................................247
15.3.1 Comparators A and B ......................................................................................................247
15.3.2 Bus Capture Information and FIFO Operation ...............................................................247
15.3.3 Change-of-Flow Information ..........................................................................................248
15.3.4 Tag vs. Force Breakpoints and Triggers .........................................................................248
15.3.5 Trigger Modes .................................................................................................................249
15.3.6 Hardware Breakpoints ....................................................................................................251
15.4 Register Definition ........................................................................................................................251
15.4.1 BDC Registers and Control Bits .....................................................................................251
15.4.1.1 BDC Status and Control Register (BDCSCR) ..............................................252
15.4.1.2 BDC Breakpoint Match Register (BDCBKPT) ............................................253
15.4.2 System Background Debug Force Reset Register (SBDFR) ..........................................253
15.4.3 DBG Registers and Control Bits .....................................................................................254
15.4.3.1 Debug Comparator A High Register (DBGCAH) ........................................254
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Freescale Semiconductor
17