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MC9S08GT16A Datasheet, PDF (28/300 Pages) Freescale Semiconductor, Inc – Microcontrollers
Pins and Connections
2.3.1 VDD, VSS, VDDAD, VSSAD, VREFH, VREFL — Power and Voltage
References
VDD and VSS are the primary power supply pins for the MCU. This voltage source supplies power to all
I/O buffer circuitry and to an internal voltage regulator. The internal voltage regulator provides regulated
lower-voltage source to the CPU and other internal circuitry of the MCU.
Typically, application systems have two separate capacitors across the power pins. In this case, there
should be a bulk electrolytic capacitor, such as a 10-µF tantalum capacitor, to provide bulk charge storage
for the overall system and a 0.1-µF ceramic bypass capacitor located as close to the MCU power pins as
practical to suppress high-frequency noise.
NOTE
The 48-pin QFN version of the MC9S08GT16A/GT8A has two adjacent
VSS pins. Both pins must be connected to ground with zero impedance
between them.
VDDAD and VSSAD are the analog power supply pins for the MCU. This voltage source supplies power to
the ATD. A 0.1-µF ceramic bypass capacitor should be located as close to the MCU power pins as practical
to suppress high-frequency noise.
VREFH and VREFL are the reference voltages for the analog-to-digital converter and for most accurate
performance, they must be connected directly to VDDAD and VSSAD with the shortest traces possible.
2.3.2 PTG1/XTAL, PTG2/EXTAL — Oscillator
Immediately after reset, the MCU uses an internally generated clock (self-clocked mode — fSelf_reset), that
is approximately equivalent to an 8-MHz crystal rate. This frequency source is used during reset startup
and can be enabled as the clock source for stop recovery to avoid the need for a long crystal startup delay.
This MCU also contains a trimmable internal clock generator (ICG) module that can be used to run the
MCU. For more information on the ICG, see Chapter 9, “Internal Clock Generator (S08ICGV4).”
The oscillator amplitude on XTAL and EXTAL is gain limited for low-power oscillation. Typically, these
pins have a 1-V peak-to-peak signal. For noisy environments, the high gain output (HGO) bit can be set to
enable rail-to-rail oscillation.
The oscillator in this MCU is a Pierce oscillator that can accommodate a crystal or ceramic resonator in
either of two frequency ranges selected by the RANGE bit in the ICGC1 register. Rather than a crystal or
ceramic resonator, an external oscillator can be connected to the EXTAL input pin, and the XTAL output
pin can be used as general I/O. The external oscillator amplitude must not exceed VDD.
Refer to Figure 2-5 for the following discussion. RS (when used) and RF should be low-inductance
resistors such as carbon composition resistors. Wire-wound resistors, and some metal film resistors, have
too much inductance. C1 and C2 normally should be high-quality ceramic capacitors that are specifically
designed for high-frequency applications.
RF is used to provide a bias path to keep the EXTAL input in its linear range during crystal startup and its
value is not generally critical. Typical systems use 1 MΩ to 10 MΩ. Higher values are sensitive to humidity
and lower values reduce gain and (in extreme cases) could prevent startup.
MC9S08GT16A/GT8A Data Sheet, Rev. 1
28
Freescale Semiconductor