MC9S08GT16A Datasheet, PDF (277/300 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Characteristics
A.10.1 Control Timing
Table A-12. Control Timing
Parameter
Symbol
Min
Typical
Max
Unit
Bus frequency (t_cyc = 1/f_Bus)
V_DD ≥ 2.1 V
f_Bus
V_DD < 2.1 V
Real-time interrupt internal oscillator period
t_RTI
0
—
20
MHz
0
8
750
1150
1550
µs
External reset pulse width¹
t_extrst
1.5 x
f_{Self_reset}
—
ns
Reset low drive²
t_rstdrv
34 x
f_{Self_reset}
—
ns
Active background debug mode latch setup time
t_MSSU
25
—
ns
Active background debug mode latch hold time
t_MSH
25
—
ns
IRQ pulse width³
t_ILIH
1.5 x t_cyc
—
ns
Port rise and fall time (load = 50 pF)⁴
Slew rate control disabled
Slew rate control enabled
t_Rise, t_Fall
—
3
ns
—
30
1 _{This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to}
override reset requests from internal sources.
2 _{When any reset is initiated, internal circuitry drives the reset pin low for about 34 cycles of fSelf_reset and then samples the level}
on the reset pin about 38 cycles later to distinguish external reset requests from internal requests.
3 _{This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or}
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
4 _{Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 125°C.}
1600
1400
1200
1000
Period (µs)
800
600
400
200
0
–40 –20 0
20 40
60 80 100 120 140
Temperature (°C)
Figure A-11. Typical RTI Clock Period vs. Temperature
= +3 Sigma
= Mean
= –3 Sigma
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Freescale Semiconductor
277