AN983B Datasheet, PDF (73/91 Pages) List of Unclassifed Manufacturers – PCI/miniPCI-to-Ethernet LAN Controller

AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY
contains to default value then clear the bit 15 of PHY register 0 to 0.
8.8 WAKE ON LAN FUNCTION
The AN983B can assert a signal to wake up the system when it received a Magic Packet from the
network. The Wake on LAN operation is described as follow.
8.8.1 THE MAGIC PACKET FORMAT
Valid destination address that can pass the address filter of the AN983B
The payload of frame must include at least 6 contiguous ‘FF’ followed immediately by
16 repetitions of IEEE address.
The frame can contain multiple ‘six FF + sixteen IEEE address’ pattern.
CRC OK
8.8.2 THE WAKE ON LAN OPERATION
The Wake on LAN enable function is controlled by bit 18 of CSR18; it is loaded from EEPROM
after reset or programmed by driver to enable Wake on LAN function. If the bit 18 of CSR18 is set
and the AN983B receive a Magic Packet, it will assert the PME# signal (drive to low) to indicate
receiving a wake up frame as well as to set the PME status bit (the bit 15 of CSR20).
8.9 ACPI POWER MANAGEMENT FUNCTION
The AN983B has a built-in capability for Power Management (PM), which controlled by the host
system
The AN983B will provide:
Compatibility with Device Class Power Management Reference
Specification, Rev1.09
Compatibility with ACPI specification, Rev 1.0
Compatibility with PCI Bus Power Management Interface Specification,
Rev 1.1
Compatibility with AMD Magic Packet™ Technology.
Rev. 1.8
ADMtek Inc.
www.admtek.com.tw