AN983B Datasheet, PDF (24/91 Pages) List of Unclassifed Manufacturers – PCI/miniPCI-to-Ethernet LAN Controller

AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY
timer expires and the AN983B still asserted FRAME#, then the
AN983B will terminate the data transaction as soon as its
GNT# is removed.
7 ~ 0 CLS
Cache Line Size. This value specifies the system cache line 0
R/W
size in units of 32-bit double words (DW). The AN983B
supports 8, 16, and 32 DW of cache line size. This value is
used by the AN983B driver to program the cache alignment
bits (bit 14 and 15 of CSR0). The cache alignment bits are
used for cache oriented PCI commands; say
memory-read-line, memory-read-multiple, and
memory-write-and-invalidate.
CR4 (offset = 10h), IOBA - I/O Base Address
Bit # Name Descriptions
Default Val RW Type
31~ 8 IOBA
I/O Base Address. This value indicate the base address of PCI 0
R/W
control and status register (CSR0~28)
7 ~ 1 ---
Reserved.
0
IOSI
I/O Space Indicator.
1
RO
1: means that the configuration registers map into the I/O
space.
CR5 (offset = 14h), MBA - Memory Base Address
Bit # Name Descriptions
31~ 10 MBA
Memory Base Address. This value indicate the base address
of PCI control and status register (CSR0~28)
9 ~ 1 ---
Reserved.
0
IOSI
Memory Space Indicator.
1: means that the configuration registers map into the I/O
space.
Default Val RW Type
0
R/W
0
RO
CR11 (offset = 2ch), SID - Subsystem ID.
Bit # Name Descriptions
Default Val RW Type
31~16 SID
Subsystem ID. This value is loaded from EEPROM after power From
RO
on or hardware reset.
EEPROM
15~ 0 SVID
Subsystem Vendor ID. This value is loaded from EEPROM after From
RO
power on or hardware reset.
EEPROM
CR12 (offset = 30h), BRBA - Boot ROM Base Address.
Bit # Name Descriptions
Default Val RW Type
31~17 BRBA
Boot ROM Base Address. This value indicates the address
X: b31~18 R/W
mapping of boot ROM field. Besides, it also defines the boot 0: b17~10
ROM size. The value of bit 17~10 is set to 0 for AN983B
RO
supports up to 256KB of boot ROM.
16 ~ 1 ---
Reserved
0
RO R/W
Rev. 1.8
ADMtek Inc.
www.admtek.com.tw