AN983B Datasheet, PDF (50/91 Pages) List of Unclassifed Manufacturers – PCI/miniPCI-to-Ethernet LAN Controller

AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY
3:0 PHY_ID[3-0]
(bits 5-0)
Revision Number (bits 3-0);
RO
Register 3, bit 0 is LS bit of PHY
Identifier
This uses the OUI of ADMtek, device type of 1 and rev 0.
0001(bin)
Register 4
BIT NAME
15 Next Page
14 Reserved
13 Remote Fault
12:1 Not implemented
1
10 Pause
9
Not implemented
8
100BASE-TX full
duplex
7
100BASE-TX half
duplex
6
10BASE-T full
duplex
5
10BASE-T half
duplex
4:0 Selector Field
DESCRIPTION
1 = Device set to use Next Page,
0 = Device not set to use Next Page
1 = Local remote fault sent to link
partner
0 = no fault detected
Technology ability bits A7-A6
READ/WRITE
R/W
RO
R/W
RO
DEFAULT
0
0
0
00
Technology ability bit A5
R/W
Technology ability bit A4
RO
Technology ability bit A3
R/W
1 = Unit is capable of Full Duplex
0 = Unit is not capable of Full
Duplex
Technology ability bit A2
R/W
1 = Unit is capable of Half Duplex
0 = Unit is not capable of Half
Duplex 100BASE-TX
Technology ability bit A1
R/W
1 = Unit is capable of Full Duplex
10BASE-T
0 = Unit is not capable of Full
Duplex 10BASE-T
Technology ability bit A0
R/W
1 = Unit is capable of Half Duplex
10BASE-T
0 = Unit is not capable of Half
Duplex 10BASE-T
Identifies type of message being
RO
sent. Currently only one value is
defined.
0
0
0
0
0
0
00001
Register 5
The register is used to view the advertised capabilities of the link partner once autonegotiation is complete.
Rev. 1.8
ADMtek Inc.
www.admtek.com.tw