AN983B Datasheet, PDF (32/91 Pages) List of Unclassifed Manufacturers – PCI/miniPCI-to-Ethernet LAN Controller

AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY
12
---
Reserved
11
GPTT
General Purpose Timer Time-out, base on CSR11 timer
0
register
10
---
Reserved
9
RWT
Receive Watchdog Time-out, based on CSR15 watchdog timer 0
register
8
RPS
Receive Process Stopped, receive state = stop
0
7
RDU
Receive Descriptor Unavailable
0
1: while the next receive descriptor can’t be applied by
AN983B. The receive process is suspended in this situation.
To restart the receive process, the ownership bit of next
receive descriptor should be set to AN983B and a receive poll
demand command should be issued (or a new recognized
frame is received, if the receive poll demand is not issued).
6
RCI
Receive Completed Interrupt
0
1: while a frame reception is completed.
5
TUF
Transmit Under-Flow
0
1: while the transmit FIFO had an under-flow condition
happened during transmitting. The transmit process will
enter the suspended state and report the under-flow error
on bit1 of TDES0.
4
---
Reserved
3
TJT
Transmit Jabber Timer Time-out
0
1: while the transmit jabber timer expired. The transmit
processor will enter the stop state and the transmit jabber
time-out flag of bit 14 of TDES0 will be asserted.
2
TDU
Transmit Descriptor Unavailable
0
1: while the next transmit descriptor can’t be applied by
AN983B. The transmission process is suspended in this
situation. To restart the transmission process, the ownership
bit of next transmit descriptor should be set to AN983B and if
the transmit automatic polling is not enabled then a transmit
poll demand command should be issued.
1
TPS
Transmit Process Stopped.
0
1: while transmit state = stop
0
TCI
Transmit Completed Interrupt.
0
1: means a frame transmission is completed while bit 31 of
TDES1 is asserted in the first transmit descriptor of the
frame.
LH = High Latching and cleared by writing 1.
RO/LH*
RO/LH*
RO/LH*
RO/LH*
RO/LH*
RO/LH*
RO/LH*
RO/LH*
RO/LH*
RO/LH*
CSR6 (offset = 30h), NAR - Network access register
Bit # Name Descriptions
Default Val RW Type
Rev. 1.8
ADMtek Inc.
www.admtek.com.tw