AN983B Datasheet, PDF (61/91 Pages) List of Unclassifed Manufacturers – PCI/miniPCI-to-Ethernet LAN Controller

AN983B PCI/miPCI Fast Ethernet Controller with integrated PHY
8.3 TRANSMIT SCHEME AND TRANSMIT EARLY
INTERRUPT
8.3.1 TRANSMIT FLOW
The flow of packet transmit is shown as below.
Initial
Program the descriptor, and place data
into the host memory
Change own bit to 1
Write tx demand poll
AN983B read descriptor
available descriptor(own=1)
read data and put into tx fifo
own=0
End
no deferring and greater than tx
threshold DO TRANSMIT read the rest data
collision ?
write descriptor
generate interrupt
Yes
No
back -off
Fig - 9 Transmit flow
8.3.2 TRANSMIT PRE-FETCH DATA FLOW
Transmit FIFO size=2K-byte
Two packets in the FIFO at the same time
Meet the transmit min. back-to-back
Rev. 1.8
ADMtek Inc.
www.admtek.com.tw