W65C22S Datasheet, PDF (44/46 Pages) List of Unclassifed Manufacturers – Versatile Interface Adapter (VIA)

The Western Design Center, Inc.
W65C22S Data Sheet
4. SECTION 4 CAVEATS
4.1 Caveats
1. On older versions of the 6522 and 65C22, which are not internally chip-selected, random register are read due
to register select values. The W65C22S selects only register 15 ($F) internally. This feature has been added for
systems which have indeterminate register select values.
2. When outputting the Shift Clock, the CB1 pin may be overdriven without affecting the shifting function.
However, this is not recommended as it will result in high currents and possible damage to the part. Because
some systems have been arbitrating the clock after data has been transferred, this feature was added.
3. There is a major design difference between the W65C22S and all previous versions of the 6522 and 65C22.
The IRQB pin on the W65C22S is a standard totem pole output. It is no longer open drain and cannot be wire
OR'ed. This change was made to improve the low power, high speed characteristics of the part.
OLD
W65C22
IRQB
IRQ
IRQ
NEW
W65C22S
IRQB
Figure 4-1 IRQB Difference
4. All W65C22S pins except PHI2 have bus holding devices. The original NMOS 6522, G65C22 and
R65C22 did not have bus holding devices.
OLD
W65C22
RESB
RESET
NEW
W65C22S
RESB
RESET
HIGH RESISTANCE
BUS HOLDING DEVICE
Figure 4-2 High Resistance Bus Holding Device
5. The W65C22S output pins do not have current limiting and can over drive circuitry connected to these
pins. The original NMOS 6522 had current limiting resistors in series with PB and PA outputs.
The Western Design Center
W65C22S
44