W65C22S Datasheet, PDF (37/46 Pages) List of Unclassifed Manufacturers – Versatile Interface Adapter (VIA)

The Western Design Center, Inc.
W65C22S Data Sheet
3.3 AC Characteristic TA=-40°C to +85°C
Table 3-3 W65C22S AC Characteristics
Processor Interface Timing
Symbol
Parameter
5.0+/-5%
Min Max
14 MHz
3.3 +/-10%
Min
Max
10 MHz
3.0+/-5%
Min
Max
8 MHz
2.5+/-5%
Min Max
4 MHz
1.8+/-5%
Min
Max
2MHz
Units
tCYC _{Cycle Time}
70
-
100
-
125
-
250
-
500
-
nS
tPWH ^{Phase 2 Pulse Width}
High
35
-
50
-
62
-
125
-
250
-
nS
tPWL ^{Phase 2 Pulse Width}
Low
35
-
50
-
63
-
125
-
250
-
nS
tR,F _{Phase 2 Transition}
-
5
-
5
-
5
-
5
-
5
nS
ACR Select, RWB Setup ¹⁰
-
10
-
10
-
20
-
40
-
nS
Select, RWB Hold
tCAR _{(PHI2 rising edge)}
10
-
10
-
10
-
10
-
10
-
nS
tCDR Data Bus Delay
-
20
-
25
-
35
-
80
-
180
pF
Data Bus Hold
tHR _Time
10
-
10
-
10
-
10
-
10
-
nS
Peripheral Data
tPCR _Setup
10
-
10
-
30
-
60
-
120
-
nS
tACW Select, RWB Setup ¹⁰
-
10
-
10
-
20
-
90
-
nS
Select, RWB Hold
tCAW _{(PHI2 rising edge)}
10
-
10
-
10
-
10
-
10
-
nS
tDCW Data Bus Setup
10
-
10
-
10
-
20
-
40
-
nS
tHW Data Bus Hold
10
-
10
-
10
-
10
-
10
-
nS
tCPW
Peripheral Data
Delay
-
30
-
50
-
60
-
120
-
240
nS
The Western Design Center
W65C22S
37