W65C22S Datasheet, PDF (11/46 Pages) List of Unclassifed Manufacturers – Versatile Interface Adapter (VIA)

The Western Design Center, Inc.
W65C22S Data Sheet
1.3. Read Handshake Control.
Read Handshaking provides effective control of data transfers from a peripheral device to the microprocessor. To
accomplish the Read Handshake, the peripheral device generates a Data Ready signal to the W65C22S that indicates
valid data is present on PA or PB. In most cases, this Data Ready signal will interrupt the microprocessor, which
will then read the data and generate a Data Taken signal. Once the peripheral senses the Data Taken signal, new
data will be placed on the bus. This process continues until the data transfer is complete.
Automatic Read Handshaking applies to PA only. The Data Ready signal is transmitted by the peripheral device
over the CA1 interrupt line, while the Data Taken signal is generated and transmitted to the peripheral device over
the CA2 line. When the Data Ready signal is received, it sets an internal flag in the Interrupt Flag Register (IFR).
This flag may interrupt the microprocessor or it may be polled under program control. As an option, the Data Taken
signal may be either a pulse or a level. In either case, it is set to a Logic 0 by the microprocessor and is set by the
next Data Ready signal, see Figure 1-1.
PHI2
“DATA READY”
(CA1)
IRQB OUTPUT
READ IRA OPERATION
“DATA TAKEN”
HANDSHAKE MODE (CA2)
“DATA TAKEN”
PULSE MODE (CA2)
Figure 1-1 Read Handshake Operation (PA Only)
The Western Design Center
W65C22S
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