PD488588FF Datasheet, PDF (55/79 Pages) Elpida Memory – 288M bits Direct Rambus DRAM for High Performance Solution

µPD488588FF-C80-40
26. Electrical Conditions
Electrical Conditions
Symbol
Tj
VDD, VDDa
VDD,N,VDDa,N
VDD,N,VDDa,N
VCMOS
VTERM
VREF
VDIL
VDIH
VDIS
ADI
VX
VCM
VCIS, CTM
VCIS, CFM
VIL, CMOS
VIH, CMOS
Parameter and Conditions
MIN.
MAX.
Unit
Junction temperature under bias

100
°C
Supply voltage
2.50 – 0.13
2.50 + 0.13
V
Supply voltage droop (DC) during NAP interval (tNLIMT)
—
2.0
%
Supply voltage ripple (AC) during NAP interval (tNLIMT)
–2.0
+2.0
%
Supply voltage for CMOS pins (2.5V controllers)
2.50 – 0.13
2.50 + 0.25
V
Supply voltage for CMOS pins (1.8V controllers)
1.80 – 0.1
1.80 + 0.2
V
Termination voltage
1.80 – 0.1
1.80 + 0.1
V
Reference voltage
1.40 – 0.2
1.40 + 0.2
V
RSL data input - low voltage
VREF – 0.5
VREF – 0.2
V
RSL data input - high voltage
VREF + 0.2
VREF + 0.5
V
RSL data input swing : VDIS = VDIH – VDIL
0.4
1.0
V
RSL data asymmetry : ADI = [(VDIH – VREF) + (VDIL – VREF)] / VDIS
0
–20
%
RSL clock input - crossing point of true and complement signals
1.3
1.8
V
RSL clock input - common mode VCM = (VCIH + VCIL ) / 2
1.4
1.7
V
RSL clock input swing : VCIS = VCIH – VCIL (CTM, CTMN pins).
0.35
1.00
V
RSL clock input swing : VCIS = VCIH – VCIL (CFM, CFMN pins).
0.225
1.00
V
CMOS input low voltage
– 0.3
+ (VCMOS / 2– 0.25) V
CMOS input high voltage
VCMOS / 2+0.25
VCMOS + 0.3
V
Data Sheet E0251N20 (Ver. 2.0)
55