BCM43907 Datasheet, PDF (42/128 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 a/b/g/n SoC with an Embedded Applications Processor

BCM43907 Preliminary Data Sheet
USB 2.0
USB 2.0 Features
The following capabilities and features apply to the BCM43907 USB 2.0 PHY:
• Compliant with the UTMI+ level 2 specification.
• Functions as a host, device, or OTG PHY.
• Supports high speed (HS) at 480 Mbps, full speed (FS) at 12 Mbps, and low speed (LS) at 1.5 Mbps.
• Integrates pull-up and pull-down terminations with resistor support (per an engineering change notice to the
USB 2.0 specification).
• Contains a calibrated 45Ω termination for HS TX/RX.
• Uses half-duplex differential data signaling with NRZI encoding.
• Recovers the data and clock from the data stream.
• Integrates a 960 MHz PLL with a single-ended reference clock.
• Supports host resume and remote wake-up.
• Supports L1 and L2 suspend, shallow sleep, and Link-Power Management (LPM).
• Supports legacy USB 1.1 devices through a serial interface.
• Supports dribble bits.
• Supports LS keep-alive packets (LS EOP).
• Support HS keep-alive packets (HS SYNC).
• Contains an onboard BERT for self-testing (PRBS and fixed patterns).
• Dissipates a maximum power of 150 mW for 1-port in loop-back mode.
• Contains an integrated 3.3V to 1.2V LDO.
• Uses 3.3V.
Broadcom^®
March 12, 2016 • 43907-DS104-R
BROADCOM CONFIDENTIAL
Page 41