BCM43907 Datasheet, PDF (113/128 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 a/b/g/n SoC with an Embedded Applications Processor

BCM43907 Preliminary Data Sheet
SPI Flash Timing
SPI Flash Timing
Read-Register Timing
Figure 31 shows the SPI flash extended and quad read-register timing.
Note: Regarding Figure 31: All Read Register commands except Read Lock Register are supported. A Read Nonvolatile Configuration
Register operation will output data starting from the least significant byte.
Figure 31: SPI Flash Read-Register Timing
Extended
C
DQ0
DQ1
0
Command
MSB
High-Z
Quad
C
DQ[3:0]
0
Command
MSB
7
8
LSB
D_OUT
MSB
1
2
LSB
D_OUT
MSB
9
10
D_OUT
D_OUT
3
LSB
D_OUT
D_OUT
11
D_OUT
12
D_OUT
13
14
15
D_OUT
D_OUT
LSB
D_OUT
D_OUT
Don’t care
Broadcom^®
March 12, 2016 • 43907-DS104-R
BROADCOM CONFIDENTIAL
Page 112