BCM43907 Datasheet, PDF (108/128 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 a/b/g/n SoC with an Embedded Applications Processor

BCM43907 Preliminary Data Sheet
SDIO Interface Timing
SDIO Bus Timing Specifications in SDR Modes
Clock Timing
SDIO clock timing in the SDR modes is shown by the combination of Figure 26 and Table 47.
Figure 26: SDIO Clock Timing (SDR Modes)
t_CLK
SDIO_CLK
t_CR
t_CF
t_CR
Parameter
–
–
Clock duty
cycle
Table 47: SDIO Bus Clock Timing Parameters (SDR Modes)
Symbol
t_CLK
t_CR, t_CF
–
Minimum
40
20
–
30
Maximum
–
–
0.2 × t_CLK
70
Unit
ns
ns
ns
%
Comments
SDR12 mode
SDR25 mode
C_CARD = 10 pF
–
Broadcom^®
March 12, 2016 • 43907-DS104-R
BROADCOM CONFIDENTIAL
Page 107