STC5420 Datasheet, PDF (46/70 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

STC5420
Synchronous Clock for SETS
Data sheet
History accumulator holdover bandwidth and ramp controls.
Bits 7 ~ 4
Long Term
History -3dB
Bandwidth
0
4.9 mHz
1
2.5 mHz
2
1.2 mHz
3
0.62 mHz
4
0.31 mHz
5
0.15 mHz
6, 7
Reserved
8
1.3Hz
9
0.64Hz
10
0.32Hz
11
0.16Hz
12
79mHz
13
40mHz
14
20mHz
15
9.9mHz
Bits 3 ~ 2
0
1
2
3
Short Term
History -3dB
Bandwidth
1.3 Hz
0.64 Hz
0.32 Hz
0.16 Hz
Bits 1 ~ 0
0
1
2
3
Default value: 27 (1.2mHz; 0.64Hz; 2ppm/sec)
Ref_Priority_Table, 0x36 (R/W)
Ramp control
No Control
1.0 ppm/sec
1.5 ppm/sec
2.0 ppm/sec
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x36
0x37
Ref 2 Priority
Ref 4 Priority
Ref 1 Priority
Ref 3 Priority
0x38
0x39
Ref 6 Priority
Ref 8 Priority
Ref 5 Priority
Ref 7 Priority
0x3A
0x3B
Ref 10 Priority
Ref 12 Priority
Ref 9 Priority
Ref 11 Priority
Reference priority for automatic reference selector. Lower values have higher priority:
Page 46 of 70
Rev:2.0
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 28, 2011