EP3SL110F1152C2N Datasheet, PDF (97/341 Pages) Altera Corporation – Stratix III Device Handbook,

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–87
Table 1–57. EP3SL70 Column Pins Output Timing Parameters (Part 2 of 4)
I/O Standard
Clock
Fast Model
Industrial Commercial
C2
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
GCLK t_co
4mA
GCLK
PLL
t_co
3.061
3.047
3.286
3.272
4.658 5.066 5.583 5.443 5.661 5.193 5.710 5.572 5.729 ns
4.646 5.055 5.573 5.433 5.651 5.183 5.701 5.563 5.720 ns
GCLK t_co
6mA
GCLK
PLL
t_co
3.035
3.035
3.259
3.259
4.629 5.037 5.555 5.415 5.633 5.165 5.683 5.545 5.702 ns
4.632 5.041 5.559 5.419 5.637 5.169 5.688 5.550 5.707 ns
DIFFERENTIAL
GCLK t_co
1.5-V HSTL
CLASS I
8mA
GCLK
PLL
t_co
3.031
3.035
3.255
3.257
4.625 5.033 5.552 5.412 5.630 5.162 5.680 5.542 5.699 ns
4.618 5.024 5.540 5.400 5.618 5.151 5.667 5.529 5.686 ns
GCLK t_co
10mA _GCLK
PLL
t_co
3.036
3.064
3.259
3.289
4.626 5.034 5.551 5.411 5.629 5.161 5.679 5.541 5.698 ns
4.657 5.064 5.581 5.441 5.659 5.192 5.708 5.570 5.727 ns
GCLK t_co
12mA _GCLK
PLL
t_co
3.053
3.048
3.277
3.273
4.645 5.052 5.569 5.429 5.647 5.180 5.696 5.558 5.715 ns
4.645 5.053 5.570 5.430 5.648 5.181 5.698 5.560 5.717 ns
DIFFERENTIAL
GCLK t_co
1.5-V HSTL
CLASS II
16mA _GCLK
PLL
t_co
3.034
3.032
3.258
3.256
4.627 5.034 5.551 5.411 5.629 5.162 5.680 5.542 5.699 ns
4.625 5.032 5.549 5.409 5.627 5.160 5.677 5.539 5.696 ns
GCLK t_co
4mA
GCLK
PLL
t_co
3.036
3.036
3.258
3.259
4.617 5.022 5.537 5.397 5.615 5.149 5.664 5.526 5.683 ns
4.625 5.032 5.549 5.409 5.627 5.160 5.677 5.539 5.696 ns
GCLK t_co
6mA
GCLK
PLL
t_co
3.052
3.052
3.276
3.276
4.641 5.047 5.563 5.423 5.641 5.175 5.690 5.552 5.709 ns
4.641 5.047 5.563 5.423 5.641 5.175 5.690 5.552 5.709 ns
DIFFERENTIAL
GCLK t_co
1.8-V HSTL
CLASS I
8mA
GCLK
PLL
t_co
3.042
3.035
3.266
3.258
4.631 5.037 5.553 5.413 5.631 5.165 5.681 5.543 5.700 ns
4.617 5.022 5.537 5.397 5.615 5.149 5.664 5.526 5.683 ns
GCLK t_co
10mA _GCLK
PLL
t_co
3.029
3.025
3.246
3.249
4.575 4.976 5.487 5.347 5.565 5.101 5.612 5.474 5.631 ns
4.622 5.031 5.549 5.409 5.627 5.160 5.678 5.540 5.697 ns
GCLK t_co
12mA _GCLK
PLL
t_co
3.029
3.025
3.246
3.249
4.575 4.976 5.487 5.347 5.565 5.101 5.612 5.474 5.631 ns
4.622 5.031 5.549 5.409 5.627 5.160 5.678 5.540 5.697 ns
DIFFERENTIAL
GCLK t_co
1.8-V HSTL
CLASS II
16mA _GCLK
PLL
t_co
3.029
3.025
3.246
3.249
4.575 4.976 5.487 5.347 5.565 5.101 5.612 5.474 5.631 ns
4.622 5.031 5.549 5.409 5.627 5.160 5.678 5.540 5.697 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2