EP3SL110F1152C2N Datasheet, PDF (290/341 Pages) Altera Corporation – Stratix III Device Handbook,

1–280
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–128. EP3SE110 Row Pins Output Timing Parameters (Part 2 of 3)
I/O Standard
Clock
Fast Model
Industrial Commercial
C2
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
GCLK t_co
4mA _GCLK
PLL ^tco
3.160
1.357
3.406
1.541
4.814 5.220 5.733 5.595 5.866 5.348 5.862 5.724 5.943 ns
1.990 2.090 2.300 2.314 2.312 2.200 2.415 2.424 2.301 ns
DIFFERENTIAL
1.5-V
6mA
HSTL CLASS I
GCLK t_co
GCLK
PLL ^tco
3.149
1.346
3.396
1.531
4.810 5.216 5.730 5.592 5.863 5.345 5.859 5.721 5.940 ns
1.986 2.086 2.297 2.311 2.309 2.197 2.412 2.421 2.298 ns
GCLK t_co
8mA _GCLK
PLL ^tco
3.146
1.343
3.393
1.528
4.808 5.214 5.728 5.590 5.861 5.343 5.858 5.720 5.939 ns
1.984 2.084 2.295 2.309 2.307 2.195 2.411 2.420 2.297 ns
GCLK t_co
4mA _GCLK
PLL ^tco
3.157
1.354
3.403
1.538
4.809 5.215 5.727 5.589 5.860 5.343 5.856 5.718 5.937 ns
1.985 2.085 2.294 2.308 2.306 2.195 2.409 2.418 2.295 ns
GCLK t_co
6mA _GCLK
PLL ^tco
3.147
1.344
3.394
1.529
4.807 5.213 5.726 5.588 5.859 5.342 5.856 5.718 5.937 ns
1.983 2.083 2.293 2.307 2.305 2.194 2.409 2.418 2.295 ns
DIFFERENTIAL
1.8-V
8mA
HSTL CLASS I
GCLK t_co
GCLK
PLL ^tco
3.133
1.330
3.380
1.515
4.792 5.198 5.712 5.574 5.845 5.327 5.841 5.703 5.922 ns
1.968 2.068 2.279 2.293 2.291 2.179 2.394 2.403 2.280 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.130
1.327
3.376
1.511
4.788 5.194 5.708 5.570 5.841 5.323 5.837 5.699 5.918 ns
1.964 2.064 2.275 2.289 2.287 2.175 2.390 2.399 2.276 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.127
1.324
3.374
1.509
4.789 5.197 5.711 5.573 5.844 5.326 5.841 5.703 5.922 ns
1.965 2.067 2.278 2.292 2.290 2.178 2.394 2.403 2.280 ns
DIFFERENTIAL
GCLK t_co
1.8-V
16mA _GCLK
HSTL CLASS II
PLL ^tco
3.128
1.325
3.374
1.509
4.779 5.185 5.698 5.560 5.831 5.313 5.827 5.689 5.908 ns
1.955 2.055 2.265 2.279 2.277 2.165 2.380 2.389 2.266 ns
GCLK t_co
4mA _GCLK
PLL ^tco
3.177
1.374
3.427
1.562
4.850 5.258 5.774 5.636 5.907 5.387 5.903 5.765 5.984 ns
2.026 2.128 2.341 2.355 2.353 2.239 2.456 2.465 2.342 ns
DIFFERENTIAL
1.5-V
6mA
SSTL CLASS I
GCLK t_co
GCLK
PLL ^tco
3.153
1.350
3.403
1.538
4.832 5.241 5.757 5.619 5.890 5.370 5.888 5.750 5.969 ns
2.008 2.111 2.324 2.338 2.336 2.222 2.441 2.450 2.327 ns
GCLK t_co
8mA _GCLK
PLL ^tco
3.136
1.333
3.384
1.519
4.810 5.219 5.735 5.597 5.868 5.348 5.866 5.728 5.947 ns
1.986 2.089 2.302 2.316 2.314 2.200 2.419 2.428 2.305 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation