EP3SL110F1152C2N Datasheet, PDF (164/341 Pages) Altera Corporation – Stratix III Device Handbook,

1–154
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–83. EP3SL200 Column Pins Output Timing Parameters (Part 3 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
2mA
GCLK t_co
GCLK
PLL ^tco
3.868
4.267
3.868
4.267
5.701 5.947 6.513 6.370 6.775 5.947 6.513 6.370 6.775 ns
6.336 6.587 7.217 7.045 7.532 6.587 7.217 7.045 7.532 ns
4mA
GCLK t_co
GCLK
PLL ^tco
3.687
4.086
3.687
4.086
5.422 5.638 6.165 6.023 6.427 5.638 6.165 6.023 6.427 ns
6.057 6.278 6.870 6.699 7.184 6.278 6.870 6.699 7.184 ns
GCLK t_co 3.605
3.605 5.315 5.523 6.055 5.912 6.317 5.523 6.055 5.912 6.317 ns
6mA _GCLK
PLL ^tco
4.004
4.004 5.950 6.163 6.759 6.587 7.074 6.163 6.759 6.587 7.074 ns
1.8 V
GCLK t_co 3.585
3.585 5.257 5.469 5.989 5.846 6.251 5.469 5.989 5.846 6.251 ns
8mA _GCLK
PLL ^tco
3.984
3.984 5.892 6.109 6.693 6.521 7.008 6.109 6.693 6.521 7.008 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.522
3.921
3.522
3.921
5.196 5.394 5.908 5.765 6.170 5.394 5.908 5.765 6.170 ns
5.831 6.034 6.612 6.440 6.927 6.034 6.612 6.440 6.927 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.504
3.903
3.504
3.903
5.175 5.373 5.885 5.742 6.147 5.373 5.885 5.742 6.147 ns
5.810 6.013 6.589 6.417 6.904 6.013 6.589 6.417 6.904 ns
2mA
GCLK t_co
GCLK
PLL ^tco
3.814
4.213
3.814
4.213
5.630 5.879 6.451 6.308 6.713 5.879 6.451 6.308 6.713 ns
6.265 6.519 7.155 6.983 7.470 6.519 7.155 6.983 7.470 ns
4mA
GCLK t_co
GCLK
PLL ^tco
3.602
4.001
3.602
4.001
5.311 5.523 6.059 5.916 6.321 5.523 6.059 5.916 6.321 ns
5.946 6.163 6.763 6.591 7.078 6.163 6.763 6.591 7.078 ns
GCLK t_co 3.577
3.577 5.244 5.463 5.992 5.849 6.254 5.463 5.992 5.849 6.254 ns
6mA _GCLK
PLL ^tco
3.976
3.976 5.879 6.103 6.696 6.524 7.011 6.103 6.696 6.524 7.011 ns
1.5 V
GCLK t_co 3.566
3.566 5.227 5.438 5.972 5.829 6.234 5.438 5.972 5.829 6.234 ns
8mA _GCLK
PLL ^tco
3.965
3.965 5.862 6.078 6.676 6.504 6.991 6.078 6.676 6.504 6.991 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.511
3.910
3.511
3.910
5.189 5.387 5.902 5.759 6.164 5.387 5.902 5.759 6.164 ns
5.824 6.027 6.606 6.434 6.921 6.027 6.606 6.434 6.921 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.506
3.905
3.506
3.905
5.172 5.376 5.891 5.748 6.153 5.376 5.891 5.748 6.153 ns
5.807 6.016 6.595 6.423 6.910 6.016 6.595 6.423 6.910 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation