EP3SL110F1152C2N Datasheet, PDF (237/341 Pages) Altera Corporation – Stratix III Device Handbook,

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–227
Table 1–108. EP3SE50 Row Pins Output Timing Parameters (Part 3 of 3)
I/O Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
GCLK t_co
4mA _GCLK
PLL ^tco
3.088
3.099
3.322
3.332
4.721 5.136 5.662 5.519 5.722 5.272 5.802 5.657 5.793 ns
4.722 5.137 5.661 5.518 5.721 5.271 5.800 5.655 5.791 ns
GCLK t_co
6mA _GCLK
PLL ^tco
3.089
3.075
3.323
3.309
4.720 5.135 5.660 5.517 5.720 5.271 5.800 5.655 5.791 ns
4.705 5.120 5.646 5.503 5.706 5.256 5.785 5.640 5.776 ns
DIFFERENTIAL
1.8-V
8mA
SSTL CLASS I
GCLK t_co
GCLK
PLL ^tco
3.072
3.069
3.305
3.303
4.701 5.116 5.642 5.499 5.702 5.252 5.781 5.636 5.772 ns
4.702 5.119 5.645 5.502 5.705 5.255 5.785 5.640 5.776 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.070
3.119
3.303
3.356
4.692 5.107 5.632 5.489 5.692 5.242 5.771 5.626 5.762 ns
4.763 5.180 5.708 5.565 5.768 5.316 5.847 5.702 5.838 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.095
3.077
3.332
3.313
4.745 5.163 5.691 5.548 5.751 5.299 5.832 5.687 5.823 ns
4.723 5.141 5.669 5.526 5.729 5.277 5.810 5.665 5.801 ns
GCLK t_co
8mA
DIFFERENTIAL
1.8-V
SSTL CLASS II
GCLK
PLL ^tco
GCLK t_co
16mA _GCLK
PLL ^tco
3.123
3.108
3.097
3.077
3.359
3.344
3.333
3.313
4.763 5.180 5.707 5.564 5.767 5.316 5.847 5.702 5.838 ns
4.749 5.165 5.692 5.549 5.752 5.301 5.832 5.687 5.823 ns
4.744 5.162 5.689 5.546 5.749 5.298 5.830 5.685 5.821 ns
4.721 5.138 5.666 5.523 5.726 5.275 5.806 5.661 5.797 ns
GCLK t_co
8mA
DIFFERENTIAL
2.5-V SSTL
CLASS I
GCLK
PLL ^tco
GCLK t_co
12mA _GCLK
PLL ^tco
3.074
3.079
3.072
3.100
3.309
3.313
3.306
3.335
4.717 5.135 5.662 5.519 5.722 5.271 5.803 5.658 5.794 ns
4.708 5.123 5.648 5.505 5.708 5.258 5.787 5.642 5.778 ns
4.707 5.124 5.651 5.508 5.711 5.261 5.792 5.647 5.783 ns
4.735 5.151 5.677 5.534 5.737 5.287 5.817 5.672 5.808 ns
DIFFERENTIAL
GCLK t_co
2.5-V
16mA _GCLK
SSTL CLASS II
PLL ^tco
3.082
3.068
3.318
3.302
4.720 5.136 5.662 5.519 5.722 5.272 5.802 5.657 5.793 ns
4.697 5.112 5.637 5.494 5.697 5.248 5.777 5.632 5.768 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2