EP3SL110F1152C2N Datasheet, PDF (336/341 Pages) Altera Corporation – Stratix III Device Handbook,

1–326
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
Glossary
Glossary
The following table lists the glossary for this chapter.
Table 1.
Glossary Table (Part 1 of 4)
Letter
A
B
C
D
Subject
—
—
—
Receiver Input Waveforms
Single-Ended Waveform
Definitions
—
—
—
V_ID
V_CM
Positive Channel (p) = V_IH
Negative Channel (n) = V_IL
Ground
Differential Waveform
V_ID
Differential I/O
Standards
Transmitter Output Waveforms
Single-Ended Waveform
V_CM
V_OD
p−n=0V
V_ID
Positive Channel (p) = V_OH
Negative Channel (n) = V_OL
Ground
Differential Waveform
V_OD
p−n=0V
V_OD
E
—
—
F
f_{H S C L K}
High-Speed I/O Block: High-speed receiver/transmitter input and output clock frequency.
f_{H S D R}
High-Speed I/O Block: Maximum/minimum LVDS data transfer rate
(f_{H S D R} = 1/TUI), non-DPA.
f_{H S D R D PA}
High-Speed I/O Block: Maximum/minimum LVDS data transfer rate
(f_{H S D R D PA} = 1/TUI), DPA.
G
—
—
H
—
—
I
—
—
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation