EP3SL110F1152C2N Datasheet, PDF (322/341 Pages) Altera Corporation – Stratix III Device Handbook,

1–312
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
EP3SL70 Clock Timing Parameters
Table 1–148 and Table 1–149 list the global clock timing specifications for EP3SL70
devices.
.
Table 1–148. EP3SL70 Column Pin Global Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.749
1.749
-0.012
-0.012
1.735
1.735
-0.021
-0.021
C2
C3
C4
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
2.434 2.702 3.056
2.434 2.702 3.056
-0.255 -0.306 -0.251
-0.255 -0.306 -0.251
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.950 3.403
2.950 3.403
-0.203 -0.044
-0.203 -0.044
I3
V_CCL=
1.1 V
2.702
2.702
-0.306
-0.306
I4
V_CCL=
1.1 V
3.056
3.056
0.161
0.161
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.950 3.403
2.950 3.403
-0.203 -0.044
-0.203 -0.044
Units
ns
ns
ns
ns
Table 1–149. EP3SL70 Row Pin Global Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.732
1.650
0.051
-0.031
1.840
1.749
0.115
0.024
C2
C3
C4
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
2.524 2.758 3.083
2.382 2.595 2.902
-0.144 -0.219 -0.193
-0.286 -0.382 -0.374
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.986 3.227
2.815 3.068
-0.144 -0.188
-0.315 -0.347
I3
V_CCL=
1.1 V
2.811
2.641
-0.170
-0.340
I4
V_CCL=
1.1 V
3.157
2.968
0.275
0.086
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
3.042 3.260
2.863 3.101
-0.097 -0.234
-0.276 -0.393
Units
ns
ns
ns
ns
Table 1–150 and Table 1–151 list the regional clock timing parameters for EP3SL70
devices.
Table 1–150. EP3SL70 Column Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.689
1.689
-0.011
-0.011
1.689
1.689
-0.022
-0.022
C2
C3
C4
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
2.388 2.649 3.004
2.388 2.649 3.004
-0.261 -0.308 -0.256
-0.261 -0.308 -0.256
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.723 3.132
2.723 3.132
-0.207 -0.054
-0.207 -0.054
I3
V_CCL=
1.1 V
2.649
2.649
-0.308
-0.308
I4
V_CCL=
1.1 V
3.014
3.014
0.224
0.224
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.723 3.132
2.723 3.132
-0.207 -0.054
-0.207 -0.054
Units
ns
ns
ns
ns
Table 1–151. EP3SL70 Row Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.637
1.555
0.018
-0.064
1.726
1.635
0.085
-0.006
C2
C3
C4
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
2.353 2.566 2.885
2.211 2.403 2.704
-0.176 -0.252 -0.230
-0.318 -0.415 -0.411
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.786 2.964
2.615 2.805
-0.180 -0.226
-0.351 -0.385
I3
V_CCL=
1.1 V
2.625
2.455
-0.203
-0.373
I4
V_CCL=
1.1 V
2.948
2.759
0.307
0.118
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.839 3.001
2.660 2.842
-0.139 -0.272
-0.318 -0.431
Units
ns
ns
ns
ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation